1. Write a behavioral VHDL module that implements the 8-bit shift register of Figure A.SI(Serial in)8-Bit Serial-In, Serial-OutShift RegisterSO(Serial out)(Serial in)?CLK(a) Block diagram(Serial out)—00000000-CLK(b) Logic diagramFigure A.Do not use individual flip-flops in your code. Add an active-low asynchronous reset input, ClrN.Simulate the module to obtain a timing diagram similar to Figure B. Then, write VHDL code fora 16-bit serial-in, serial-out shift register using two of these modules.
1. Write a behavioral VHDL module that implements the 8-bit shift regi…
Jun 22, 2024
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