Compound Semiconductor

2D MoS₂ FPGA integrates 4000 FETs

Now a Chinese team, led by Peng Zhou and Wenzhong Bao at Fudan University, has developed a top-gate (TG) 2D ...
EurekAlert!

First 2D semiconductor FPGA achieves wafer-scale integration

Researchers at Fudan University have achieved a breakthrough by fabricating the first Field-Programmable Gate Array (FPGA) ...
IEEE

Development of a High-Performance Data Acquisition and Processing System Based on System-on-Module and Field-Programmable Gate Array for Portable and Embeddable Optical Instruments

Abstract: Highly integrated data acquisition and processing (DAQP) systems play an important role in promoting the miniaturization of high-performance optical instruments. Currently, such systems are ...
Scientific Research Publishing

Akers, S.B. (1972) A Rectangular Logic Array. IEEE Transactions on Computers, 21, 848-857.

ABSTRACT: A new nano-based architectural design of multiple-stream convolutional homeomorphic error-control coding will be conducted, and a corresponding hierarchical implementation of important class ...
Reuters

IBM says conventional AMD chips can run quantum computing error correction algorithm

SAN FRANCISCO, Oct 24 (Reuters) - IBM (IBM.N), opens new tab said on Friday it can run a key quantum computing error correction algorithm on commonly available chips ...
EDN

Programmable current source with overtemperature shutoff

Recently, we’ve seen Design Ideas for programmable current sources with improved accuracy using the LM3x7 series of three-legged regulators. These designs also take advantage of those classic devices’ ...
IEEE

Design of a Drivable Area Segmentation Network Using a Field Programmable Gate Array Based on Light Detection and Ranging

Abstract: With the continuing development of autonomous driving systems, the drivable area segmentation problem has become an indispensable part of self-driving cars. The drivable area segmentation ...