EDN

Simple SPICE phase locked loop (PLL)

IC designer Don Sauer saw my blog about the difficulties of simulating PLLs and sent me a SPICE file (zip) of a basic PLL that you can play with. Don writes: I have a simple spice netlist for a PLL ...
Hackaday

phase-locked loop

That big grandfather clock in the library might be an impressive piece of mechanical ingenuity, and an even better example of fine cabinetry, but we’d expect that the accuracy of a pendulum timepiece ...
Design-Reuse

Understanding the basics of PLL frequency synthesis

Configuring a phase locked loop (PLL) for a given frequency synthesis application can simultaneously be both a quick-and easy-process as well as a time-consuming, tedious, and iterative process. This ...
IEEE

Session T1A: Tutorial: Phase-locked clock generation for SoC: Circuit and system design aspects

Abstract: A phase-locked loop is a key building block in wireline and wireless systems. In the wireline systems, low-jitter clock generation and versatile clock-and-data recovery circuits are critical ...
IEEE

A Dual-Loop Frequency-Feedforward PLL for Three-Phase VSC Transient Stability Improvement

Abstract: A dual-loop frequency-feedforward phase-locked loop (DLFF-PLL) is proposed in this article. The proposed structure achieves angle and frequency tracking without integratorbased loop ...
Hackaday

Unlock The Phase Locked Loop

If you want a stable oscillator, you usually think of using a crystal. The piezoelectric qualities of quartz means that it can be cut in a particular way that it will oscillate at a very precise ...
EDN

Phase-Locked Loop Applications

This application note discusses phase frequency detector characteristics that affect phase-locked loop (PLL) dead band and jitter performance. In PLLs that employ charge pump loop filter designs the ...