IEEE

CMOS VLSI Implementation of Implicit Pulsed Dual Edge Triggered Flip Flop using Pass Transistor Logic for Power Efficient Applications

Abstract: In general, the flipflops are acting as a key circuit and major power intaking element in several digital systems modeling. In this work, a new power efficient flipflop topology titled Pass ...
IEEE

Performance Analysis of Low Power Hybrid Full Adder Using Pass Transistor Logic

Abstract: Adders play an most vital role in the logical operations of VLSI circuits, with the fast increasing of the electronics technologies, speed and size of the system improved which is indirectly ...
GitHub

Transistor-level design and verification of a 4-bit ALU using Cadence Virtuoso

This repository documents a VLSI project to design, lay out, and verify a 4-bit Arithmetic Logic Unit (ALU) capable of pipelined operations. The entire project was developed using the Cadence Virtuoso ...