IEEE

Binary adders of multigate single-electron transistors: specific design using pass-transistor logic

Abstract: We describe how to construct area-efficient adders using single-electron transistors (SETs). The design is based on pass-transistor logic and multigate SETs are used as pass transistors. The ...
IEEE

Designing low-power energy recovery adders based on pass transistor logic

Abstract: The novel design of various adiabatic adders based on pass transistor logic is introduced. Also, a new 1-bit full adder basic cell with a small number of transistors is designed. The ...
EDN

Low Power LDO Design Techniques for Really Small Profile Applications, Part 1

A key challenge to the ultra-miniaturization of electronic systems is power management. As any EE knows, when overall system sizes shrink the amount of area available for energy storage and energy ...
Electronic Design

For Designers: Logic Nets In Transistor Cans

Logical microcircuits in transistor cans are now being offered by four major companies: Fairchild Semiconductor Corp., Raytheon Co., Philco Corp., General Instrument ...
Electronics Weekly

Tunnelling transistor offers logic and power on the same easy-to-make IC

Only eight lithography masks to create a low-power custom logic chips, compared with 20+ for CMOS, is the claim of Nottingham-based fabless chip start-up ‘Search For The Next’ (SFN). As such, ...
Semiconductor Engineering

Applying a Floating Gate Field Effect Transistor To A Logic-in-Memory Application Circuit Design

A technical paper titled “Analysis of Logic-in-Memory Full Adder Circuit With Floating Gate Field Effect Transistor (FGFET)” was published by researchers at Konkuk University, Korea National ...
Electronic Design

For Designers: Logic Nets in Transistor Cans (ED article from 1961)

March 29, 1961 - LOGICAL microcircuits in transistor cans are now being offered by four major companies. Heavy research and production is being pressed by Fairchild Semiconductor Corp., Raytheon Co., ...