GitHub

This repository contains transistor-level simulations of NMOS, PMOS, 2:1 multiplexers, and a CMOS XOR gate using HSPICE.

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Electronic Design

Dirt Cheap ASIC Design for Dummies (Part 3): NMOS, PMOS Silicon Design Using a Web Browser

Quickly learn what the difference is between PMOS and NMOS transistors in their structure and operation, and how CMOS works with the two in combination. Siliwiz, a free, browser-based, ASIC layout ...
IEEE

Modeling and simulation study of AC characteristics of an NMOS based High Pressure Sensor

Abstract: In this paper a 0.5 μm NMOS device is used as a High Pressure Sensor by incorporating a Tungsten metal gate (which acts as a Pressure sensing Diaphragm as well) and 1-Mender based serpentine ...
EDN

Low Power LDO Design Techniques for Really Small Profile Applications, Part 2

In our previous post Low Power LDO Design Techniques for Really Small Profile Applications, Part 1, we reviewed LDO design tradeoffs using an NMOS pass transistor. This design approach is proven good ...
TechSpot

How CPUs are Designed and Built, Part 2: CPU Design Process

As you probably know, processors – and most other digital technology – are made up of transistors. The simplest way to think of a transistor is as a controllable switch with three pins. When the gate ...