Semiconductor Engineering

Power Integrity And Voltage Issues Get Harder To Detect And Solve

Voltage and power integrity are becoming increasingly critical and challenging for chip designers and architects, regardless ...

Today I learned that the curvy lithography masks used by TSMC to make next-gen GPUs are 'alien', 'psychedelic' and look nothing like chip circuits

Hardware SK hynix claims world's first High NA EUV machine for 'mass production' of cutting edge chips, beating Intel to the punch Hardware We're still waiting for the first 2nm chips but TSMC is ...

The one travel gadget I always pack, and how it's unlike any other charger I've tested

Baseus' Enercore CG11 travel adapter is one of the better designed ones I've tested, although its best feature isn't ...
IEEE

Equivalent Circuit Model for Simulating ESD Discharge Current in ESD Damage Test

Abstract: Electrostatic discharge (ESD) damage evaluation methods for common mode choke (CMC) and ESD suppression devices are standardized in IEC 62228-5 Annex E and Annex F, respectively. The ...