Design-Reuse

Xilinx Planahead v2.2 Tool Delivers Up To 2X Performance Boost And 50% Design Cycle Reduction For Virtex-4 FPGAs

New release of PlanAhead floorplanner now supports Virtex-4 devices, the industry's highest density, highest speed FPGA family shipping on 90nm technology SAN JOSE, Calif., January 12, 2005 - Xilinx, ...
Design-Reuse

Xilinx Delivers PlanAhead 9.1 Design Suite - Extends Performance Advantage of 65nm Virtex-5 FPGAs

SAN JOSE, Calif., March 22, 2007 – Xilinx, Inc. (NASDAQ: XLNX) today announced immediate availability of the 9.1 version of PlanAhead™ hierarchical design and analysis software with support for ...