Ars Technica

ASIC design/verification or embedded systems programming

1. In a big company, doing ASIC design verification for a WCDMA modem for 3G cellular chips. 2. Small company, doing Embedded Software Programming. Working on the design and implementation of layer 1 ...
Ars Technica

Breaking into ASIC Design/Verification

I'm fast approaching the one year mark with my current employer since I graduated last year. Previously, I did three four month work terms with them and they were for the most part interesting. I took ...
EDN

Pre-configured DFT structures can simplify ASIC design, verification

Steven Kawamoto, Sr. Marketing Manager, Custom LSI Solutions Unit, Gaku Ogura, Sr. Marketing Manager, Design Solutions Center, Richard Lee, Design Engineer, Design ...
EDN

Verification of a single-chip Analog TV and Digital TV ASIC

Consumer entertainment products offer up many challenges for design and verification teams. How do we integrate functions from multiple previous-generation products with new features? How much time ...
Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.
New Electronics

Aion Silicon expands Barcelona Design Centre to address demand for ASIC and SoC solutions

Aion Silicon (formerly Sondrel), a specialist provider of ASIC/SoC architecture and design services, is expanding its ...
Semiconductor Engineering

Synopsys FPGA Platform: Enabling Faster Design, Verification and Debug of FPGAs

FPGA development teams are adopting ASIC-style design, verification and debug methodologies. Here are the necessary elements of such a flow. September 11th, 2019 - By: Synopsys Field programmable gate ...
Design-Reuse

Avery Design and ASIC Architect Team to Deliver Serial ATA (SATA) IP Solution

ANDOVER, Mass.--July 25, 2006--Avery Design Systems and ASIC Architect today announced a cooperative effort to deliver a comprehensive Serial ATA (SATA) design and verification IP solution. "Avery is ...
Electronic Design

Verification Platform Speeds Simulation And Emulation

R>epresenting a multifunction verification platform that provides both simulation acceleration and in-circuit emulation capabilities, the Palladium ASIC design ...
Hackaday

Remoticon Video: From Zero To ASIC; How To Design In Silicon

Designing your own integrated circuits as a one-person operation from your home workshop sounds like science fiction. But 20 years ago, so did rolling your own circuit boards to host a 600 MHz ...
Semiconductor Engineering

ASIC/IC Trends With A Focus On Factors Of Silicon Success

When Aristotle uttered this humble aphorism, he wasn’t telling us to throw up our hands and not bother with learning. He was encouraging us to continue digging deeper, to get answers and ask questions ...