RISC-V International manages the RISC-V open source instruction set. It is supported by a range of tools and compilers. This TechXchange includes content that takes a look at those tools. In this ...

This webinar by SiFive, a developer of RISC-V cores, introduces the RISC-V Architecture. It will provide an overview of RISC-V Modes, Instructions and Extensions, Control and Status Registers, and ...

If you wanted to make a CPU, and you’re not AMD or Intel, there are two real choices: ARM and RISC-V. But what are the differences between the two, and why do companies choose one over the other?

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...

A decade ago, an idea was born in a laboratory at the University of California at Berkeley to create a lingua franca for computer chips, a set of instructions that would be used by all chipmakers and ...

RISC-V architecture is an open, international standard governing how software interfaces with hardware in a computer. It serves as a shared language that sets the parameters for communication and ...