EDN

Mixed-mode verification of DDR, LCD, and memory sub-systems: Verilog-AMS vs. SPICE

Editor's note: This paper is the third in a series covering the pros and cons of using a Verilog-AMS view with respect to a SPICE view for verification of SOC IP having an analog component. The first ...
EDN

Comparing Verilog-AMS vs. SPICE view usage for robust AMS Verification of Power Management Controller and Mode Transition

The SOCs produced today provide a high level of functionality, driving a wide range of applications, while becoming more and more cost effective. This means that the complexity of the SOC too is ...