IEEE

Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node

Abstract: With the slow-down of Moore's law and the increasing requirements on energy efficiency, alternative logic styles compared to complementary static CMOS have to be revisited for digital ...
IEEE

Enabling Efficient Pure-NMOS Circuits Through Adiabatic Complementary Pass-Transistor Logic

Abstract: For many emerging computing technologies, such as wearable and flexible IoT devices, power and energy consumption may be of far greater importance than performance and operating frequency.
Physics World

NASA scientists design a nanoscale complementary vacuum field emission transistor

Jin-Woo Han is senior scientist at NASA’s Ames Research Center in California’s Silicon Valley. Along with colleagues Meyya Meyyappan, Myeong-Lok Seol and Jungsik Kim, he has designed a nanoscale ...
Electronics Weekly

Novel logic aims to beat CMOS, on 10 year older fabs

Nottingham-based SFN (Search for the Next) has characterised its novel transistor-based logic, and claims that it matches CMOS performance even when made in older fabs. It would “enable chip designers ...
Semiconductor Engineering

A Benchmark Study Of Complementary-Field Effect Transistor (CFET) Process Integration Options

Sub-5 nm logic nodes will require an extremely high level of innovation to overcome the inherent real-estate limitations at this increased device density. One approach to increasing device density is ...