Structured ASICs are gaining market traction. Designers find that a migration path from FPGA to structured ASIC and, potentially, to standard-cell or custom ASIC is a good way to manage costs. Yet a ...

Paul Taubman is a senior design engineer for Tality Corp., Cadence Design Systems' services organization. In this article he shows how test engineers should interact with designers in order to ...

The ever-increasing levels of CPU performance demanded by embedded applications and product design cycles that have often been reduced to only a few months, have made it important to produce ...

The article explains an alternative approach to Makefile, based on YAML, a structured and human-readable configuration format ...