EDN

I2C-Based Real Time Clock / Calendar – RTL Design and Verification

Designed the main architecture of ASIC IC PCF8583 by Philips Semiconductors. It involved writing time and calendar properties sent by I2C master onto an I2C based slave RAM.
Semiconductor Engineering

Integrating Design Verification To Approach Zero Defects

The approach enables DFT and design verification (DV) teams to operate in parallel, accelerating development cycles while improving fault coverage. This cohesive strategy not only boosts test ...
Semiconductor Engineering

Modification Of An Existing E-Graph Based RTL Optimization Tool As A Formal Verification Assistant

A technical paper titled “Datapath Verification via Word-Level E-Graph Rewriting” was published by researchers at Intel Corporation and Imperial College London. “Formal verification of datapath ...
Dhaka Tribune

CVES launches course on RTL design, verification and VLSI synthesis

The American International University-Bangladesh (AIUB) inaugurated a new professional industry-focused course titled “RTL Design, Verification, Synthesis and PnR for Digital VLSI Design” on October 5 ...
Electronic Design

RTL Design Verification Tool Eliminates Learning Curve

Designed to be easy to use by eliminating the learning curve normally associated with formal register transfer level (RTL) design verification technology, BlackTie is offered as a functional checker ...